Metallic pillars or pillar bumps, which are one type of vertical interconnect technology, can be attached to bond pads or redistribution metal pads of semiconductor chips or other microelectronic devices via metallic pillar electroplating technologies that are known to those familiar with the art. The term “pad” as used herein is a layered metal structure deposited on a substrate as is well known in the art.
The metallic pillars are placed on the chips/devices while the chips/devices are still in their wafer form. Metallic pillars (e.g., copper, gold, or other metals/alloys) have the potential to be used as functional under bump metallurgy (“UBM”) and as plated vertical extensions with solder caps, provided that reliable and efficient methods can be developed to form the pillars on the wafer seed layer. Typically, solder ball based flip-chip (“FC”) and/or chip scale package (“CSP”) style interconnects (or “solder bumps”) require suitable UBM pads to act as adhesion layers and/or diffusion barriers between the wafer/substrate metallization and the solder bump itself. These types of solder ball interconnects also require sufficient area on the device surface so they do not short together during processing or subsequent assembly of the device to another substrate material.
A metallic pillar or pillar bump offers a rigid but highly adjustable vertical structure (e.g., in the z-direction) when compared to typical solder bump or solder ball CSP interconnects. In applications where narrow interconnect pitch and control of the stand-off distance between two surfaces is required, such as between a device and its associated substrate, the metallic pillar bump acts as a fixed standoff interposer to control that distance, while a smaller solder cap performs the joint connection between the device and substrate. Controlling this stand-off distance is important to overall system performance and reliability.
Metallic pillars are currently formed using a multiple step process which includes electrodeposition (e.g., electroplating or plating) of the metallic pillar comprised of one or more metal layers including the option of an additional electrodeposition of a solder “cap”. Typically, metallic pillars are plated by electrodeposition directly onto a metal seed layer over underlying metal bond pads on the semiconductor wafer. The overall process of using this series of electrodeposition steps can be costly and time-intensive. An alternate method which incorporates the same electrodeposition of the metallic pillar but with a printed solder cap was introduced to the industry by the Assignee hereof. While this eliminates the solder plating time needed, there still remains a time-intensive plating of the metallic pillar. Co-owned, co-pending U.S. patent Ser. No. 12/828,003 describes additional information concerning the electroplating of metallic pillars and is hereby incorporated by reference in its entirety.
Known metallic pillar bump manufacturing methods use a photo-definable mask material (e.g., photoresist) into which to electroplate and form the pillar structure crowned by an electroplated solder amount. Plating the solder is a slow, expensive process that requires considerable process control. Plating also limits the preferred solder to a common binary solder alloy. It is known that electroplating a more complex material than a binary solder alloy to form the solder portion of the pillar bump is very difficult to control in a manufacturing environment.
Metallic pillar bump structures also offer improved thermal transfer and conductivity compared to equivalent FC or CSP solder bump stand-offs. Metallic pillar bump structures have the potential to be a cost-effective, reliable interconnect option for certain markets in the microelectronics industry. However, reliable and lower cost manufacturable methods as alternative to electrodeposition are needed for building reliable, cost effective fixed stand-off metallic pillar structures.
The following detailed description is merely exemplary in nature and is not intended to limit the invention or to limit the applications and uses of the invention. As used herein, the word “exemplary” means “serving as an example, instance, or illustration.” Thus, any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments. All of the embodiments described herein are exemplary embodiments provided to enable persons skilled in the art to make or use the invention and not to limit the scope of the invention which is defined by the claims. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, brief summary, or the following detailed description.